He dug deeper. On the 17IPS72P schematic, that resistor connected to a test point labeled TP_JTAG_DIS . The note next to it: “For factory debug only — remove before shipping.”
Once he bridged the missing resistor with a 0Ω jumper, the board sprang to life. The fan spun. The CPU warmed. POST code 55 — memory training. Then, the glorious Lenovo logo. 17ips72p schematic
The 17IPS72P schematic had hidden a deliberate trap: a factory-only debug path that, if accidentally closed, turned a perfectly good motherboard into a “dead” one. Lenovo never documented this in public manuals. Alex realized: the schematic wasn’t just a map — it was a puzzle meant to be solved by those who read between the lines. He dug deeper
Why would Lenovo add an optional resistor in the PS_ON wake path? The fan spun
Most technicians ignored that. But Alex remembered a bricked Y720 that wouldn’t power past 0.2A. He measured resistance between and ground — shorted. The short led to a capacitor near the GPU, but that capacitor was fine. The real culprit? A leftover solder bridge on R1401 ’s pads, permanently disabling the JTAG isolation and holding the PCH in a debug state.
It was 2 AM when Alex, a veteran laptop repair technician, first noticed the anomaly. He was reverse-engineering a water-damaged Lenovo Legion Y720. The board code was clear: , rev 1.0. On paper, it was just another Kaby Lake + Pascal GPU design — but the schematic told a different story.